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minos: report live CPU privilege mode in banner

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Adds arch_cpu_mode() to the contract, reading real hardware state:
x86 CS.CPL -> ring0, RISC-V mhartid (M-only CSR) -> M-mode,
ARM CPSR[4:0] -> SVC. Confirms M1 runs fully privileged, no user mode.
This commit is contained in:
auser 2026-09-25 01:05:01 +03:00
parent 8c44d12357
commit 59a433f949
5 changed files with 47 additions and 0 deletions
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16
arch/arm/arch.c
View file

@ -52,6 +52,22 @@ const char *arch_name(void)
return "arm (cortex-a9, zynq-7000)";
}
const char *arch_cpu_mode(void)
{
/* CPSR bits[4:0] = mode. 0x13=SVC, 0x10=USR, 0x1F=SYS, 0x12=IRQ. */
unsigned long cpsr;
__asm__ volatile("mrs %0, cpsr" : "=r"(cpsr));
switch (cpsr & 0x1f) {
case 0x10: return "USR";
case 0x11: return "FIQ";
case 0x12: return "IRQ";
case 0x13: return "SVC";
case 0x1a: return "HYP";
case 0x1f: return "SYS";
default: return "?";
}
}
void arch_halt(void)
{
for (;;)

12
arch/riscv/arch.c
View file

@ -40,6 +40,18 @@ const char *arch_name(void)
return "riscv64 (rv64imac)";
}
const char *arch_cpu_mode(void)
{
/* RISC-V has no register that reports the current privilege level to
* software (by design). But mhartid is an M-mode-only CSR: if this
* code is running and already read it in boot.S without trapping, we
* are in M-mode. (A trap here would prove otherwise.) */
unsigned long id;
__asm__ volatile("csrr %0, mhartid" : "=r"(id));
(void)id;
return "M-mode";
}
void arch_halt(void)
{
for (;;)

12
arch/x86/arch.c
View file

@ -62,6 +62,18 @@ const char *arch_name(void)
return "x86 (i386, multiboot)";
}
const char *arch_cpu_mode(void)
{
/* CPL = low 2 bits of CS. 0 = ring0 (kernel), 3 = ring3 (user). */
unsigned short cs;
__asm__ volatile("mov %%cs, %0" : "=r"(cs));
switch (cs & 3) {
case 0: return "ring0";
case 3: return "ring3";
default: return "ring?";
}
}
void arch_halt(void)
{
for (;;)

3
common/main.c
View file

@ -18,6 +18,9 @@ void kmain(void)
puts(" arch: ");
puts(arch_name());
puts("\n");
puts(" cpu mode: ");
puts(arch_cpu_mode());
puts(" (most privileged; no user mode yet)\n");
puts(" M1: booted, UART up, trap vector set\n");
puts("========================================\n");
puts("hello from kmain()\n");

4
include/arch.h
View file

@ -23,6 +23,10 @@ void arch_set_trap_vector(void);
/* Name of the architecture, for the banner. */
const char *arch_name(void);
/* Human-readable current CPU privilege mode (e.g. "ring0", "M-mode",
* "SVC"). Reads the live hardware state so the banner proves it. */
const char *arch_cpu_mode(void);
/* Halt the CPU (wfi / hlt) — end of kmain(). */
void arch_halt(void) __attribute__((noreturn));