@ vectors.S (ARMv7-A) — the exception vector table VBAR points at.
@ M1 keeps every entry a self-loop; M2 will wire IRQ to a C handler
@ via the GIC. The 8 standard ARM vectors, in order.

	.section .text
	.align 5              @ vector base must be 32-byte aligned
	.global vector_table
vector_table:
	b	.                @ 0x00 Reset
	b	.                @ 0x04 Undefined instruction
	b	.                @ 0x08 Supervisor Call (SVC)
	b	.                @ 0x0C Prefetch Abort
	b	.                @ 0x10 Data Abort
	b	.                @ 0x14 (reserved)
	b	.                @ 0x18 IRQ
	b	.                @ 0x1C FIQ