minos/arch/riscv/boot.S
auser 8c44d12357 minos M1: minimal multi-arch kernel (x86 + RISC-V + ARM/Zynq)
Boots under QEMU on all three ISAs from one clang build:
- shared C core (kmain, console) calls a small per-arch contract (arch.h)
- per-arch asm entry + trap/vector table + UART driver
- parallel Makefile (make -j), 'make run-<arch>', 'make sizes'
M1 = boot, UART up, trap vector installed, banner from kmain().
2026-09-25 00:41:24 +03:00

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ArmAsm

# boot.S (RISC-V rv64) — the minimal asm entry.
# QEMU 'virt' with -bios none enters here at 0x80000000 in M-mode,
# all harts. We park every hart but hart 0, set a stack, clear .bss,
# and jump to kmain(). This is the irreducible asm part for this arch.
.section .text.boot
.globl _start
_start:
# Only hart 0 continues; others wait forever (WFI loop).
csrr t0, mhartid
bnez t0, park
# Set up the stack (defined in the linker script).
la sp, _stack_top
# Zero the .bss section: [__bss_start, __bss_end).
la t0, __bss_start
la t1, __bss_end
1: bgeu t0, t1, 2f
sd zero, (t0)
addi t0, t0, 8
j 1b
2:
call kmain
park:
wfi
j park