Boots under QEMU on all three ISAs from one clang build: - shared C core (kmain, console) calls a small per-arch contract (arch.h) - per-arch asm entry + trap/vector table + UART driver - parallel Makefile (make -j), 'make run-<arch>', 'make sizes' M1 = boot, UART up, trap vector installed, banner from kmain().
29 lines
641 B
ArmAsm
29 lines
641 B
ArmAsm
@ boot.S (ARM, Cortex-A9 / ARMv7-A) — minimal entry for the Zynq PS.
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@ QEMU 'xilinx-zynq-a9' enters at the image load address. We set a stack,
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@ clear .bss, and call kmain(). Irreducible asm part for ARM.
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.section .text.boot
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.global _start
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_start:
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@ Park secondary CPUs: only CPU0 continues.
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mrc p15, 0, r1, c0, c0, 5 @ read MPIDR
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and r1, r1, #3 @ CPU id (affinity level 0)
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cmp r1, #0
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bne park
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ldr sp, =_stack_top @ set up the stack
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@ Zero .bss: [__bss_start, __bss_end)
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ldr r0, =__bss_start
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ldr r1, =__bss_end
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mov r2, #0
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1: cmp r0, r1
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bge 2f
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str r2, [r0], #4
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b 1b
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2:
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bl kmain
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park:
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wfi
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b park
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