8c44d12357
Boots under QEMU on all three ISAs from one clang build: - shared C core (kmain, console) calls a small per-arch contract (arch.h) - per-arch asm entry + trap/vector table + UART driver - parallel Makefile (make -j), 'make run-<arch>', 'make sizes' M1 = boot, UART up, trap vector installed, banner from kmain().
10 lines
308 B
ArmAsm
10 lines
308 B
ArmAsm
# trap.S (RISC-V) — the machine-mode trap entry the M1 mtvec points at.
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# M1 keeps it trivial: just loop. M2 will save registers and dispatch to
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# a C handler for the timer interrupt.
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.section .text
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.globl trap_entry
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.align 4 # mtvec base must be 4-byte aligned
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trap_entry:
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wfi
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j trap_entry
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