minos/arch/arm/vectors.S
auser 8c44d12357 minos M1: minimal multi-arch kernel (x86 + RISC-V + ARM/Zynq)
Boots under QEMU on all three ISAs from one clang build:
- shared C core (kmain, console) calls a small per-arch contract (arch.h)
- per-arch asm entry + trap/vector table + UART driver
- parallel Makefile (make -j), 'make run-<arch>', 'make sizes'
M1 = boot, UART up, trap vector installed, banner from kmain().
2026-09-25 00:41:24 +03:00

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ArmAsm

@ vectors.S (ARMv7-A) — the exception vector table VBAR points at.
@ M1 keeps every entry a self-loop; M2 will wire IRQ to a C handler
@ via the GIC. The 8 standard ARM vectors, in order.
.section .text
.align 5 @ vector base must be 32-byte aligned
.global vector_table
vector_table:
b . @ 0x00 Reset
b . @ 0x04 Undefined instruction
b . @ 0x08 Supervisor Call (SVC)
b . @ 0x0C Prefetch Abort
b . @ 0x10 Data Abort
b . @ 0x14 (reserved)
b . @ 0x18 IRQ
b . @ 0x1C FIQ